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Athlon 64 X2

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Athlon 64 X2 E6 3800+
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Athlon 64 X2 E6 3800+

The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. It is essentially a processor consisting of two Athlon 64 cores joined together on one die with some additional control logic. The cores share one dual-channel memory controller, are based on the E-stepping model of Athlon 64 and, depending on the model, have either 512 or 1024 KiB of L2-Cache per core. The X2 is capable of decoding SSE3 instructions (except those few specific to Intel's architecture), so it can run and benefit from software optimizations that were previously only supported by Intel chips. This enhancement is not unique to the X2, and is also available in the recently released Venice and San Diego single core Athlon 64's. AMD officially started shipping the Athlon 64 X2 at Computex, on 1st June 2005.

The main benefit of dual core processors like the X2 is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single core Athlon 64 of the same speed. The need for TLP processing capability is dependent on situation to a great degree, and certain situations benefit from it far more than others. Certain programs are currently only written with one thread, and are therefore unable to utilize the processing power of the second core.

Programs often written with multiple threads and capable of utilizing dual cores include many music and video encoding applications, and especially professional rendering programs. High TLP applications currently correspond to server/workstation situations more than the typical desktop. These applications can realize almost twice the performance of a single core Athlon 64 of the same specifications. Multi-tasking also runs a sizable number of threads; intense multi-tasking scenarios have actually shown improvements of considerably more than two times [link]. This is primarily due to the excessive overhead caused by constantly switching threads, and could potentially be improved by adjustments to operating system scheduling code.

Due to the nature of their application, most 3D games cannot be effectively multithreaded without disproportionate development time. There are exceptions, the most famous being the Quake III engine on which r_smp = 1 may be set, enabling multithreading support. The benefit is slight, but present. It's left to easily parallelizable tasks (image manipulation, media encoding, etc.) where different parts of the workload can be worked on independently to properly extract the power of a multi-core processor.

Having two cores, the Athlon 64 X2 has an increased number of transistors. The 1 MiB L2 cache X2 processor has 233.2 million transistors [link] whereas its Athlon 64 counterpart has only 114 million transistors [link]. As a result, a larger area of silicon must be defect free. These size requirements necessitate a more complex fabrication process, which further adds to the production of fewer functional processors per single silicon wafer. This lower yield makes the X2 more expensive to produce than the single core processor.

CPU Cores

Toledo (90 nm Dual-core CPU

Manchester (90 nm Dual-core CPU

Windsor (90 nm Dual-core CPU In the middle of June, 2006, AMD has stated that they will no longer make any non-FX Athlon 64 or Athlon 64 X2 models with 1MB L2 caches. This led to a only a small amount of the Socket AM2 Athlon 64 X2 4000+, 4400+, and 4800+ models being produced. This leaves the Socket AM2 Athlon 64 X2 model line with only the 512KB L2 cache models: 3800+, 4200+, 4600+, and 5000+.

See also

External links

 


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