Instruction Set Simulator

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An Instruction Set Simulator (ISS) is a simulation model, usually coded in a high-level language, which mimics the behavior of a processor by reading instructions and maintaining internal variables which represent the processor's registers. It is generally used to improve the speed performance of simulations involving a processor core where the processor itself is not one of the elements being verified; verilog simulation with ISS by means of PLI speeds considerably.

An ISS is often provided with debugger in order for a software engineer to debug the program prior to obtaining target hardware. GDB is one of debuggers which have compiled-in ISS. It is sometimes integrated with simulated peripheral circuits such as timers, interrupts, serial port, general I/O port, etc to mimic the behavior of microcontroller.

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