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NAR 1

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NAR 1 or just NAR (Serbian Nastavni Računar, en. Educational Computer) was a theoretical model of a computer created by Faculty of Mathematics of University of Belgrade professor Nedeljko Parezanović. It was used for Assembly language and Computer architecture courses.

NAR 1 processor has a 5-bit address bus (32 bytes of addressable memory) and 8-bit data bus. Machine instructions were single-byte with three most significant bits specifying the opcode and 6 least significant bits the parameter - memory address. A single 8-bit accumulator register was available and there were no flags or flag registers. Only absolute addressing mode was available and all others were achieved by self-modifying code. Following opcodes were available:

Two more instructions were optional (ie. their functioanlity can be achieved otherwise):

Trivia

See also


Computer systems from Serbia
1980‑2000: TIM-100 | TIM-001 | TIM-600 | TIM-011 | TIM-40M | ATLAS-TIM AT 32 | Galaksija | Galaksija Plus | Pecom 32 | Pecom 64 | Lira XT | Lola 8 | PA512 | LPA512
1960‑1979: CER Computers (CER-10, CER-2, CER-20, CER-200, CER-202, CER-22, CER-12, CER-203) | HRS-100
Theoretical: NAR 1 | NAR 2
See also: Full lists from Serbia | former Yugoslavia |
and
history of computing in: Serbia | former Yugoslavia | (former) communist countries | World

 


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