WDC 65816/65802

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W65C816S microprocessor in DIP. The processor is also available in a square LCC package.

The WDC 65816 (also: 65C816), a 16-bit microprocessor CPU developed by the Western Design Center (WDC), is an expanded and compatible successor to the venerable MOS Technology 6502.

The 65816 was second-sourced by GTE, Sanyo and a couple of other semiconductor companies from the mid-to-late 1980s to the early 1990s. As of 2006 it is still sold by WDC, and the architecture has also been implemented as an IP core in some systems, such as Winbond's W55V9x series of TV Edutainment ICs.

The processor was designed almost entirely by Bill Mensch, who began work on the chip after consulting Apple Computer in 1982. The only person who aided him in his work was his sister Kathryn who did part of the layout. The chip was finished in March, 1984 with samples sent to both Apple and Atari. The number 65 comes from the 6502 compatibility and 816 signifies that it can work in both 8 and 16 bit modes.

CPU features

This list gives the major features of the 65C816S (S = static core):

• Fully static CMOS design for low power consumption (300 µA @ 1 MHz) and increased noise immunity
• Wide operating voltage range: 1.8V±5%, 2.5V±5%, 3.0V±5%, 3.3V±10%, 5.0V±5% for use with varying voltage peripherals
• Emulation mode allows complete hardware and software compatibility with 6502 designs
• 24-bit address bus provides access to 16 MBytes of memory space
• 16-bit ALU, accumulator, stack pointer and index registers
• Valid Data Address (VDA) and Valid Program Address (VPA) output for dual cache and cycle steal DMA implementation
• Vector Pull (VPB) output indicates when interrupt vectors are being addressed
• Abort (ABORTB) input and associated vector supports processor repairs of bus error conditions
• Separate program and data bank registers allow program segmentation or full 16 MByte linear addressing
• Direct register and stack relative addressing provides capability for reentrant, recursive and re-locatable programming
• 24 addressing modes - 13 original 6502 modes with 92 instructions using 256 op codes (including some new opcodes from the 65C02)
• Wait-for-Interrupt (WAI) and Stop-the-Clock (STP) instructions further reduce power consumption, decrease interrupt latency and allows synchronization with external events
• Co-Processor (COP) instruction with associated vector supports co-processor configurations, e.g., floating point processors
• Block move ability

The 65802

The WDC 65802 (also: 65C802) is a 65816 CPU in a 6502-pinout package (fully 6502 compatible). The 65802 was produced by WDC and GTE during the mid-to-late 1980s and early 1990s.

The chip was designed as an upgrade path from the 8-bit 6502/65C02 to the new 65816 16-bit CPU. To do this, the 65802 has a 16-bit address bus like the 6502/65C02 (64K memory space), reduced from the 24-bit address bus of the 65816. All of the bank select registers, etc., from the 65816, are still intact in the 65802 CPU core, they just have no effect when used. Typically, when hardware manufacturers have designed a project from the ground up, they have used the more powerful 65816.

Notable uses

• Apple IIGS
• Super Nintendo Entertainment System (customized CPU version, known as the 5A22)

References

• Eyes, David; Lichty, Ron (1986). Programming the 65816 including the 6502, 65C02, and 65802. New York: Brady Books/Prentice Hall Press (Simon & Schuster, Inc). ISBN 0-89303-789-3.

External links

• [W65C816S information on WDC's website] – Including a link to the PDF-format datasheet
• [A 6502 Programmer's Introduction to the 65816] – A Commodore World article by Brett Tabke; includes CMD's instruction set summary
• [65816/65C816 Technical Documents] – Hosted by Zophar's Domain
• [Winbond TV Edutainment IC Selection Guide] – ICs with 65816 CPU core

65xx-series CPUs from MOS Technology, second source/clone vendors, and the Western Design Center